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Intel Xe-HPC GPU Status Update: 4 Process Nodes Make 1 Chip - AnandTech
Aug 13, 2020 28 secs
The base tile of the GPU will be on Intel’s new 10nm SuperFin process, and the Rambo Cache will be a generation newer still, using Intel’s future 10nm Enhanced SuperFin process.

Meanwhile it’s now confirmed that the Xe Link I/O tile, which will be used as part of Intel’s fabric to link together multiple Xe-HPC GPUs, will be built by an external fab.

It's an unusual disclosure, to say the least, as we'd otherwise expect the compute die to be made on a single process.

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